
_main:

;Relay_Input_Mirror.mbas,6 :: 		main:
;Relay_Input_Mirror.mbas,7 :: 		OSCCON = %01110000 '8MHz
	MOVLW       112
	MOVWF       OSCCON+0 
;Relay_Input_Mirror.mbas,8 :: 		PLLEN_bit = 1 'Enable PLL (now 48MHz)
	BSF         PLLEN_bit+0, BitPos(PLLEN_bit+0) 
;Relay_Input_Mirror.mbas,9 :: 		TRISD = %00000000 'PortD all outputs
	CLRF        TRISD+0 
;Relay_Input_Mirror.mbas,10 :: 		TRISB = %11111111 'PortB all inputs
	MOVLW       255
	MOVWF       TRISB+0 
;Relay_Input_Mirror.mbas,11 :: 		ANCON0 = %11111111 'All digital
	MOVLW       255
	MOVWF       ANCON0+0 
;Relay_Input_Mirror.mbas,12 :: 		ANCON1 = %00011111 'All digital
	MOVLW       31
	MOVWF       ANCON1+0 
;Relay_Input_Mirror.mbas,13 :: 		while 1
L__main2:
;Relay_Input_Mirror.mbas,14 :: 		LATD = PORTB
	MOVF        PORTB+0, 0 
	MOVWF       LATD+0 
;Relay_Input_Mirror.mbas,15 :: 		delay_ms(100)
	MOVLW       7
	MOVWF       R11, 0
	MOVLW       23
	MOVWF       R12, 0
	MOVLW       106
	MOVWF       R13, 0
L__main6:
	DECFSZ      R13, 1, 1
	BRA         L__main6
	DECFSZ      R12, 1, 1
	BRA         L__main6
	DECFSZ      R11, 1, 1
	BRA         L__main6
	NOP
;Relay_Input_Mirror.mbas,16 :: 		wend
	GOTO        L__main2
L_end_main:
	GOTO        $+0
; end of _main
